I have a "technical blog help" needed !

COMPILER questions

Which data structure is used in LL(1) for taking parsing decisions and why?

Why we remove left recursion from the grammar?

COMPUTER ARCHITECTURE questions

In a Uniprocessor with cache, the processor issues its memory access request to the cache controller (CC). In the case of miss or a write- through, the CC interacts with memory controller (MC). Draw the flow charts describing the operations of a CC for a read and write operations.


Consider a four segment normalized floating point adder with 10ns delay per each segment, which equals the pipeline clock period.
a. Name the appropriate functions to be performed by the four segments
b. Find the minimum number of periods required to add n floating point numbers A1 + A2 + ... An, (where n is = last two digits of roll number of student attempting the assignment + 50) using this pipeline adder.

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